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Part: ADP3170
Category:
Description: VRM 8.5 Compatible Single Phase Core Controller
Company: Analog Devices
Datasheet: Download ADP3170 datasheet File size : 273 kB
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FEATURES Optimally Compensated Active Voltage Positioning with Gain and Offset Adjustment (ADOPTTM) for Superior Load Transient Response Complies with VRM 8.5 Specifications with Lowest System Cost 5-Bit Digitally Programmable 1.05 V to 1.825 V Output N-Channel Synchronous Buck Controller Onboard 1.8 V Linear Regulator Controller Total Accuracy 1% Over Temperature High Efficiency Current-Mode Operation Short Circuit Protection Power Good Output Overvoltage Protection Crowbar Protects Microprocessors with No Additional External Components APPLICATIONS Core and 1.8 V Standby Supplies for Next Generation Intel Pentium® III Processors
SD
VRM 8.5 Compatible Single Phase Core Controller ADP3170
FUNCTIONAL BLOCK DIAGRAM
VCC CT SET RESET CROWBAR 3.0V REFERENCE GND REF 1.8V LRFB LRDRV CS CMP CS+ FB COMP REF VID DAC gm DAC 20% REF DAC +20% PWRGD PWM LOGIC UVLO AND BIAS OSCILLATOR DRVH DRVL PGND
ADP3170
VID3 VID2 VID1 VID0 VID25
GENERAL DESCRIPTION
The ADP3170 is a highly efficient output synchronous buck switching regulator controller optimized for converting a 5 V main supply into the core supply voltage required by next generation Intel Celeron processors. The ADP3170 uses an internal 5-bit DAC to read a voltage identification (VID) code directly from the processor, which is used to set the output voltage between 1.05 V and 1.825 V. The ADP3170 uses a current mode, constant off-time architecture to drive two N-channel MOSFETs at a programmable switching frequency that can be optimized for regulator size and efficiency. The ADP3170 also uses a unique supplemental regulation technique called Analog Devices Optimal Positioning Technology (ADOPT) to enhance load transient performance. Active voltage positioning results in a dc/dc converter that meets the stringent output voltage specifications for high performance processors, with the minimum number of output capacitors and smallest footprint. Unlike voltage-mode and standard currentADOPT is a trademark of Analog Devices, Inc. Pentium is a registered trademark of Intel Corporation
mode architectures, active voltage positioning adjusts the output voltage as a function of the load current so that it is always optimally positioned for a system transient. The ADP3170 also provides accurate and reliable short circuit protection and adjustable current limiting. It also includes an integrated overvoltage crowbar function to protect the microprocessor from destruction in case the core supply exceeds the nominal programmed voltage by more than 20%. The ADP3170 contains a 1.8 V linear regulator controller that is designed to drive an external N-channel MOSFET. This linear regulator can be used to generate auxiliary voltages (such as 1.8 V standby power) required in most motherboard designs, and has been designed to provide a high bandwidth load-transient response. The ADP3170 is specified over the commercial temperature range of 0°C to 70°C and is available in a 20-lead TSSOP package.
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2001
ADP3170SPECIFICATIONS1
Parameter FEEDBACK INPUT Output Accuracy 1.05 V Output 1.5 V Output 1.825 V Output Line Regulation Input Bias Current Crowbar Trip Point Crowbar Reset Point Crowbar Response Time REFERENCE Output Voltage Output Current VID INPUTS Input Low Voltage Input High Voltage Input Current Pull-up Resistance Internal Pull-up Voltage SHUTDOWN INPUT Input Low Voltage Input High Voltage Input Current OSCILLATOR Off Time CT Charge Current ERROR AMPLIFIER Output Resistance Transconductance Output Current Maximum Output Voltage Output Disable Threshold 3 dB Bandwidth CURRENT SENSE Threshold Voltage Symbol V FB
(VCC = 12 V, IREF = 150 A, TA = 0 C to 70 C, unless otherwise noted.)
Min Typ Max Unit
Conditions
V OUT IFB V CROWBAR tCROWBAR V REF I REF V IL(VID) V IH(VID) I VID R VID
Figure 1 Figure 1 Figure 1 VCC = 10 V to 14 V % of Nominal DAC Voltage % of Nominal DAC Voltage Overvoltage to DRVL Going High
1.039 1.485 1.807
115 40
1.05 1.5 1.825 0.06 5 120 50 400 3.0
1.061 1.515 1.843 50 125 60
V V V % nA % % ns V µA V V µA k V V V µA µs µA µA M mmho µA V mV kHz mV mV mV µA ns
2.937 300
3.048
0.8 2.3 VID(X) = 0 V 2.75 300 16 3.1 425 3.4 0.8 2.0 1 TA = 25°C, CT = 200 pF TA = 25°C, VOUT in Regulation TA = 25°C, VOUT = 0 V 3.5 130 25 4.0 150 35 1 2.2 625 3.0 750 500 78 45 1 0.5 50 4.5 170 45
V IL(SD) V IH(SD) I SD
I CT
R O(ERR) g m(ERR) I O(ERR) V COMP(MAX) V COMP(OFF) BW ERR V CS(TH) ICS+, ICS tCS
2.05 FB = 0 FB Forced to VOUT 3% 600 COMP = Open FB Forced to VOUT 3% FB 0.45 V 0.8 V COMP 1 V CS+ = CS = VOUT CS+ (CS) > 87 mV to DRVH going low IL = 50 mA CL = 3000 pF 69 35
2.35
900
Input Bias Current Response Time OUTPUT DRIVERS Output Resistance Output Transition Time LINEAR REGULATOR Feedback Current LR Feedback Voltage Driver Output Voltage
87 54 5 5
R O(DRV[X]) t R , tF ILRFB V LRFB V LRDRV
4.5 75 0.3 1.8 1 1.85
ns µA V V
Figure 2, VCC = 4.5 V to 12.6 V VCC = 4.5 V, VLRFB(X) = 0 V
1.75 4.2
2
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ADP3170
Parameter POWER GOOD COMPARATOR Undervoltage Threshold Undervoltage Hysteresis Overvoltage Threshold Overvoltage Reset Point Output Voltage Low Response Time SUPPLY DC Supply Current2 UVLO Threshold Voltage UVLO Hysteresis Symbol V PWRGD(UV) V PWRGD(OV) V OL(PWRGD) Conditions % of Nominal DAC Voltage % of Nominal DAC Voltage % of Nominal DAC Voltage % of Nominal DAC Voltage IPWRGD(SINK) = 1 mA Min 74 114 40 Typ 80 5 120 50 250 200 7.5 7 1 Max 86 126 60 500 Unit % % % % mV ns mA V V
ICC V UVLO
6.75 0.8
9.5 7.25 1.2
NOTES 1 All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC). 2 Dynamic supply current is higher due to the gate charge being delivered to the external MOSFETs. Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +15 V DRVH, DRVL, LRDRV . . . . . . . . . . 0.3 V to VCC + 0.3 V All Other Inputs & Outputs . . . . . . . . . . . . . . 0.3 V to +10 V Operating Ambient Temperature Range . . . . . . . 0°C to 70°C Operating Junction Temperature . . . . . . . . . . . . . . . . . 125°C Storage Temperature Range . . . . . . . . . . . . 65°C to +150°C JA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143°C/W Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . 300°C Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 215°C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*This is a stress rating only; operation beyond these limits can cause the device to be permanently damaged. Unless otherwise specified, all voltages are referenced to GND.
ORDERING GUIDE
Model
ADP3170JRU
Temperature Range
0°C to 70°C
Package Description
TSSOP
Package Option
RU-20
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADP3170 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
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ADP3170
PIN CONFIGURATION RU-20
VID3 1 VID2 2 VID1 3 VID0 4 VID25
5 6 20 GND 1 9 PGND 1 8 DRVH 1 7 DRVL
ADP3170
1 6 VCC
TOP VIEW 1 5 LRFB PWRGD (Not to Scale) 7 1 4 LRDRV REF SD 8 FB
9 1 3 COMP 1 2 CT 1 1 CS+
CS 1 0
PIN FUNCTION DESCRIPTIONS
Pin No. 15
Mnemonic VID3, VID2, VID1, VID0, VID25 P WRGD REF SD FB CS CS+ CT COMP LRDRV LRFB VCC DRVL DRVH PGND GND
Function Voltage Identification DAC Inputs. These pins are pulled up to an internal reference, providing a logic one if left open. The DAC output programs the FB regulation voltage from 1.05 V to 1.825 V. Open drain output that signals when the output voltage is in the proper operating range. 3.0 V Reference Output. Regulator Shutdown. Pulling this pin high turns off both MOSFETs of the switching regulator. SD has no effect on the linear regulator controller. Feedback Input. Error amplifier input for remote sensing of the output voltage. Current Sense Negative Node. Negative input for the current comparator. Current Sense Positive Node. Positive input for the current comparator. The output current is sensed as a voltage at this pin with respect to CS. External capacitor connected from CT to ground sets the OFF-Time of the device. Error Amplifier Output and Compensation Point. The voltage at this output programs the output current control level between CS+ and CS. Gate Drive for the 1.8 V linear regulator N-channel MOSFET. Feedback Connections for the 1.8 V linear regulator controller. Supply Voltage for the ADP3170. Low-Side MOSFET Drive. Gate drive for the synchronous rectifier N-channel MOSFET. The voltage at DRVL swings from GND to VCC. High-Side MOSFET Drive. Gate drive for the buck switch N-channel MOSFET. The voltage at DRVH swings from GND to VCC. Power Ground. PGND should have a low impedance path to the source of the synchronous MOSFET. Small-Signal Ground. This ground reference can be used in conjunction with FB to provide remote sensing of the output voltage at the CPU pins.
6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
4
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ADP3170
ADP3170
1 2
VID3 VID2 VID1 VID0 VID25 PWRGD REF SD FB CS
GND 20 PGND 1 9 DRVH 1 8 DRVL 1 7 VCC 1 6 LRFB 1 5 LRDRV 1 4 COMP 1 3 CT 1 2 CS+ 1 1 D820
9 1
5-BIT CODE
3 4 5 6 7 8
ADP3170
VID3 VID2 VID1 VID0 VID25 PWRGD REF SD FB CS GND 20 PGND 1 9 DRVH 1 8 DRVL 1 7 VCC 1 6 LRFB 1 5 LRDRV 1 4 COMP 1 3 CT 1 2 CS+ 1 1 10nF VLR 1F VCC 100nF
12V 1F 100nF
2 3 4 5
VFB
9 10
A 00 1 100nF
6 7 8
1.2V
10
Figure 1. Closed-Loop Output Voltage Accuracy Test Circuit
Figure 2. Linear Regulator Output Voltage Accuracy Test Circuit
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